LI, Xueqing

Postdoctoral Research Associate
Department of Computer Science and Engineering
The Pennsylvania State University

Address: 351 IST Building, University Park, PA 16802, USA
Email: lixueq@cse.psu.edu

Homepage; Google Scholar

Education

Ph.D. , Department of Electronic Engineering, Tsinghua University, Beijing, China, 08/2007-07/2013
Thesis Title: Wideband High-Dynamic-Range D/A Converter Design
B.S., Department of Electronic Engineering, Tsinghua University, Beijing, China, 08/2003-07/2007

Research Interests

"Post-CMOS" circuit and system design using emerging devices, e.g. Tunnel FETs (TFET), Ferroelectric negative capacitance FET (NCFET), Hyper-FET, SymFET, etc.
- Circuit design of rectifier, DC-DC converter, current-mode logic (CML), ADC, DAC, memory, etc.
- RF-powered system design for higher power-conversion efficiency;
- Nonvolatile processor (NVP) optimization and battery-less systems;
- Emerging device evaluation for analog and mixed-signal circuit and systems.
Mixed-signal CMOS IC design, including data converters, energy harvesters (rectifier, DC-DC converter), IO interface, etc.

Project Experiences

2013-, Penn State University, emerging device, circuit and system design & evaluation

TFET: AC-DC/DC-DC converter, amplifier, current-mode logic, ADC, DAC, memory, RF circuits, etc.
SymFET: modeling and circuit design of voltage-controlled oscillator (VCO)
FinFET CMOS: SRAM design using independently-controlled gates
Ferroelectric Single-Electron Transistors: A Reconfigurable Low-Power BDD Logic Architecture
Negative Capacitance FET: Nonvolatile DFF/logic, memory, and nonvolatile processors (NVP)
VO2 diode: SRAM design with improved read/write static noise margin using VO2
Coupled Oscillators: non-Boolean image computation using VO2 coupled oscillators
Hyper-FET: Spiking Neurons design for non-Boolean computing architecture

2014-2015, Penn State University & Tsinghua University, A 14-bit 1.0GS/s DAC with DEM

First report of 90dB SFDR for uncalibrated CMOS Nyquist DACs;
First report of TRI-DEMRZ with Time-relaxed-interleaving feature;
SMIC 65nm 1P8M CMOS, 1.2x0.40mm2, 1.2V/2.5V mixed supply;
Measured SFDR @250MS/s: 90.0dB@5.5MHz; 79.2dB@122MHz;
Measured SFDR @500MS/s: 82.5dB@5.5MHz; 70.1dB@244MHz;

2013-2014, Tsinghua University, A 14-bit 1.0GS/s DAC with background calibration

Successful current source area reduction by 8 times with calibration;
Uninterrupted conversion with calibration running in the background.
SMIC 130nm 1P8M CMOS, 1.2x0.57mm2, 1.2V/3.3V mixed supply;
Measured 165mW@500MS/s; INL and DNL: 1.2 LSB and 0.4 LSB;
Measured SFDR@500MS/s: 70dB@5.4MHz; 50.3dB@224MHz;

2012-2013, Tsinghua University, A 14bit 250MS/s Nyquist DAC with TRI-DRRZ

First proposal of TRI-DRRZ for time-relaxed-interleaving DRRZ;
State-of-the-art SFDR among >250MS/s uncalibrated CMOS DACs;
SMIC 130nm 1P8M CMOS, 1.86x0.85mm2, 226mW, 1.2V/2.5V;
Measured SFDR @250MS/s: 86.2dB@5.5MHz, 77.8dB@122MHz;

2011-2013, Tsinghua University, A 14bit 1.0GS/s Nyquist DAC with CSCS and TRI-DRRZ

First proposal of optimized complementary switched current sources;
First comprehensive analysis of TRI-DRRZ switching characterisitcs;
High power efficiency among >250MS/s state-of-the-art CMOS DACs;
SMIC 130nm 1P8M CMOS, 1.85x0.65mm2, 299mW@500MS/s;
SFDR @500MS/s: 85dB@11MHz;78dB@150MHz;74dB@244MHz;
SFDR @1.0GS/s: 69dB@250MHz;66dB@350MHz;59dB@488MHz;

2012-2013, Tsinghua University, 1.0Gbps LVDS Interface

SMIC130nm 1P8M CMOS, 1.2V/3.3V mixed power supply;

2009-2010, Tsinghua University, A 12bit 250MS/s DAC in 180nm CMOS

1.8x1.9mm2, 106mW, 1.5V/1.8V, SFDR>60dB@75MHz, 250MS/s;

2007-2008, Tsinghua University, A 16bit 20kHz ΣΔ ADC

HJTC 180nm 1P6M CMOS, 1.5x1.0mm2;
Simulated dynamic range > 96dB, power < 1.0mW.

Honors and Awards

HPCA Best Paper Award (2015)
Beijing Excellent Student Award (2012)
Comprehensive Scholarship of Tsinghua University (2008, 2009, 2011, and 2012)
Excellent Student Instructor Award of Tsinghua University (2010, 2011)
Technical Internship Scholarship of Tsinghua University (2010)

Publications

Daming Zhang, Yongpan Liu, Jinyang Li, Chun Jason Xue, Xueqing Li, Yu Wang, and Huazhong Yang, “Solar Power Prediction Assisted Intra-Task Scheduling for Nonvolatile Sensor Nodes,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), accepted.
Wei-Yu Tsai, Xueqing Li, Matt Jerry et al, “Enabling new computation paradigms with Hyper-FET – an emerging device,” IEEE Transactions on Multi-Scale Computing Systems (TMSCS), accepted.
Moon Seok Kim, Xueqing Li, Huichu Liu, John Sampson, Suman Datta, and Vijaykrishnan Narayanan, “Exploration of low-power high-SFDR current-steering D/A converter design using steep-slope Heterojunction Tunnel FETs,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, accepted. [pdf]
Kaisheng Ma, Xueqing Li, Yongpan Liu, Jack Sampson, Yuan Xie, Vijaykrishnan Naryayanan, “Dynamic machine learning based matching of nonvolatile processor microarchitecture to harvested energy profile,” in ICCAD 2015. [pdf]
Yongpan Liu, Hehe Li, Jason Xue, Xueqing Li, Kaisheng Ma, Ziwei Li, Yinan Sun, Daming Zhang, Yuan Xie, Huazhong Yang, “Self-powered wearable sensor node: challenges and opportunities,” in CASES 2015. [pdf]
Kaisheng Ma, Xueqing Li, John Sampson, Yuan Xie, Yongpan Liu, Vijaykrishnan Narayanan, “Nonvolatile Processor Optimization for Ambient Energy Harvesting Scenarios,” in The 15th Non-volatile Memory Technology Symposium (NVMTS 2015). [pdf]
Kaisheng Ma, Xueqing Li, Shuangchen Li, yongpan liu, Jack Sampson, Yuan Xie, Vijaykrishnan Narayanan, "Nonvolatile processor architecture exploration for energy harvesting applications", IEEE Micro, vol.35, no.5, pp.32-40, Sept.-Oct. 2015. [pdf]
Sumitha George, Xueqing Li, Jack Sampson, Suman Datta, Sumeet Gupta, and Vijaykrishnan Narayanan, “Device-circuit analysis of low power logic and memories based on ferroelectric FETs,” in SRC TECHCON 2015. [pdf]
Yongpan Liu, Zewei Li, Hehe Li, Yiqun Wang, Xueqing Li, Kaisheng Ma, Shuangchen Li, Meng-Fan Chang, Sampson John, Yuan Xie, Jiwu Shu, Huazhong Yang, “Ambient energy harvesting nonvolatile processors: from circuit to system,” in DAC 2015. [pdf]
Kaisheng Ma, Xueqing Li, et al, “Using Multiple-Input NEMS for parallel A/D conversion and image processing,” ISVLSI 2015. [pdf]
K. Ma, Y. Zheng, S. Li, K. Swaminathan, X. Li, Y. Liu, J. Sampson, Y. Xie, V. Narayanan, “Architecture Exploration for Ambient Energy Harvesting Nonvolatile Processors,” 21st IEEE Symp. on High Performance Computer Architecture (HPCA 2015, Best Paper Award). [pdf] [slides]
Jianan Liu, Xueqing Li, Qi Wei, Huazhong Yang, “A 14-Bit 1.0-GS/s Dynamic Element Matching DAC with >80 dB SFDR up to the Nyquist,” ISCAS 2015. [pdf]
Xueqing Li, Huichu Liu, Unsuk Dennis Heo, Kaisheng Ma, Suman Datta, and Vijaykrishnan Narayanan, “RF-powered systems using steep-slope devices,” NewCAS 2014. [pdf]
Xueqing Li, Wei-Yu Tsai, Huichu Liu, Suman Datta, Vijaykrishnan Narayanan, “A low-voltage low-power LC oscillator using the diode-connected SymFET,” ISVLSI 2014. [pdf]
Nikhil Shukla, Abhinav Parihar, Matthew Cotter, Michael Barth, Xueqing Li, Nandhini Chandramoorthy, Hanjong Paik, Darrell G. Schlom, Vijaykrishan Narayanan, Arijit Raychowdhury, and Suman Datta, “Pairwise coupled hybrid vanadium dioxide-MOSFET (HVFET) oscillators for non-boolean associative computing,” IEDM 2014. [pdf][slides]
Huichu Liu, Xueqing Li, Ramesh Vaddi, Kaisheng Ma, Suman Datta, and Vijaykrishnan Narayanan, “Tunnel FET RF rectifier design for energy harvesting applications,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) vol.4, no.4, pp.400,411, Dec. 2014. [pdf]
Karthik Swaminathan, Huichu Liu, Xueqing Li, Moon Seok Kim, Jack Sampson, and Vijaykrishnan Narayanan, “Steep slope devices: enabling new architectural paradigms,” DAC 2014. [pdf]
Moon Seok Kim, Huichu Liu, Xueqing Li, Suman Datta, Vijaykrishnan Narayanan, “A Steep-Slope Tunnel FET Based SAR Analog-to-Digital Converter,” IEEE Transactions on Electron and Devices, vol. 61, no. 11, November 2014. [pdf]
Huichu Liu, Mahsa Shoaran, Xueqing Li, Suman Datta, Alexandre Schmid and Vijaykrishnan Narayanan, “Tunnel FET based ultra-low-power, low-noise amplifier design for bio-signal acquisition,” ISLPED 2014. [pdf]
Nandhini Chandramoorthy, Karthik Swaminathan, Matthew Cotter, Xueqing Li, Indranil Palit, Kevin Irick, Sharon Hu, Michael Niemier and Vijaykrishnan Narayanan, “Understanding the landscape of accelerators for vision,” SIPS 2014. [pdf]
Lu Liu, Xueqing Li, Suman Datta, and Vijaykrishnan Narayanan, “A reconfigurable low-power BDD logic architecture using ferroelectric single-electron transistors,” IEEE Transactions on Electron and Devices, vol.62, no. 3, March 2015. [pdf]
Unsuk Heo, Xueqing Li, Huichu Liu, Sumeet Gupta, Suman Datta, and Vijaykrishnan Narayanan, “A high-efficiency switched-capacitance HTFET charge pump for low-input-voltage applications,” IEEE VLSI Design 2015. [pdf]
Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang, and Huazhong Yang, “A 14 bit 500 MS/s CMOS DAC using complementary current sources and time-relaxed interleaving DRRZ,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol.61, no.8, pp.2337,2347, Aug. 2014. [pdf]
Wei-Yu Tsai, Huichu Liu, Xueqing Li, Vijaykrishnan Narayanan, “Low-power high-speed current mode logic using Tunnel-FET,” VLSI-SoC 2014. [pdf]
Kaisheng Ma, Huichu Liu, Yang Xiao, Yang Zheng, Xueqing Li, Sumeet Kumar Gupta, Yuan Xie, and Vijaykrishnan Narayanan, “Independently-controlled-gate FinFET 6T SRAM cell design for leakage current reduction and enhanced read access speed,” ISVLSI 2014. [pdf]
Moon Seok Kim, Huichu Liu, Karthik Swaminathan, Xueqing Li, Suman Datta, Vijaykrishnan Narayanan, “Enabling power-efficient designs with III-V Tunnel FETs,” CSICS 2014. [pdf][slides]
Xueqing Li, Qi Wei, Fei Qiao, and Huazhong Yang, “Balanced switching schemes for gradient-error compensation in current-steering DACs,” IEICE Trans. Electron. Vol. E95-C, No. 11, pp.1790-1798, November 2012. [pdf]
Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hua Fan, and Huazhong Yang, “A 14-bit 250-MS/s current-steering CMOS digital-to-analog converter,” Journal of Semiconductor, Vol. 34, No. 8, Aug 2013. [pdf]
Zhen Xu, Xueqing Li, Jianan Liu, Qi Wei, Li Luo, and Huazhong Yang, “A 14-bit 500-MS/s DAC with digital background calibration,” Journal of Semiconductor, Vol. 35, No. 3, March 2014. [pdf]
Xueqing Li, Qi Wei, and Huazhong Yang, “Code-independent output impedance: A new approach to increasing the linearity of current-steering DACs,” IEEE Conf. on Electronic, Circuits, and Systems (ICECS), pp. 216-219, November 2011. [pdf]

Patents

Unsuk Heo, Xueqing Li, Huichu Liu, Suman Datta, and Vijaykrishnan Narayanan, “A high-efficiency switched-capacitance HTFET charge pump,” US Patent, pending.
Huichu Liu, Xueqing Li, Vijaykrishnan Narayanan, Suman Datta, and Alexandre Schmid, “Tunnel FET-based ultra-low power, low-noise amplifier design for Bio-signal Acquisition,” US Patent, pending.
Xueqing Li, Fei Qiao, Hui Wang, and Huazhong Yang, “A current switch and a digital-to-analog converter using it”, China Patent CN201010120999.5
Xueqing Li, Huazhong Yang, Fei Qiao, and Qi Wei, “A current-steering digital-to-analog converter”, China Patent CN201110312706.8.
Xueqing Li, Huazhong Yang, Fei Qiao, and Qi Wei, “A current-steering digital-to-analog converter”, China Patent CN201110356002.0.
Xueqing Li, Huazhong Yang, Fei Qiao, Qi Wei, and Weihang Liu, “Switching sequences for symmetrical current source arrays”, China Patent CN201110457915.1.
Xueqing Li, Huazhong Yang, Fei Qiao, Qi Wei, and Weihang Liu, “Switching sequences for non-symmetrical current source arrays”, China Patent CN201110456292.6.
Jianan Liu, Xueqing Li, Huazhong Yang, Qi Wei, Fei Qiao, “Time-relaxed time-interleaving DEM decoder”, China Patent 201510250635.1, PIDE3150188, pending.
Jianan Liu, Xueqing Li, Huazhong Yang, Hui Wang, Qi Wei, Fei Qiao, Zhen Xu, “A dynamic element matching decoder”, China Patent 201510250374.3, PIDE3150189, pending.
Xueqing Li, Jianan Liu, Huazhong Yang, Hui Wang, Qi Wei, Fei Qiao, Zhen Xu, “A dynamic latch”, China Patent, 201510131780.8, PIDE3150190, pending.
Xueqing Li, Jianan Liu, Huazhong Yang, Hui Wang, Qi Wei, Fei Qiao, Zhen Xu, “A dynamic element matching decoder”, China Patent 201510132158.9, PIDE3150191, pending.
Xueqing Li, Huazhong Yang, Longqiang Lai, Qi Wei, Jianan Liu, “Background calibration techniques for current-steering digital-to-analog converters”, China Patent CN201510532204.4, pending.
Xueqing Li, Huazhong Yang, Longqiang Lai, Qi Wei, Jianan Liu, “Foreground calibration techniques for current-steering digital-to-analog converters”, China Patent CN201510532578.6, pending.
Longqiang Lai, Huazhong Yang, Xueqing Li, Qi Wei, Jianan Liu, "Calibration techniques for current-steering digital-to-analog converters", China Patent, CN201510896098.8, Pending.