Ling REN (ÈÎÁî) 4-301, Rohm Building, Dept. of Electronic Engineering Tsinghua University Beijing, 100084, China E-mail: rl08@mails.tsinghua.edu.cn Mobile: (86)15120001186

I am a senior student in Department of Electronic Engineering, and a research assistant at Nano-scale Integrated Circuit and System Laboratory, Research Institute of Circuit and System, in Tsinghua University. I mainly do research in parallel computing and computer-aided design. My advisor is Yu Wang.

Project

• Acceleration of Brain Network Analysis (BNA). In our ICCAD paper, we present a framework for accelerating BNA process by parallelizing several graph theoretical algorithms. We have released our Parallel BNA Platform. In our technical report, we propose some improvements to Pearson's correlation and blocked FW algorithm on GPU.

• GPU Sparse LU Factorization. Sparse LU factorization has become the bottleneck of circuit simulation. It is also a fundamental problem and has wide application. Our work is the first one on GPU sparse LU factorization.

Publication

• [ICCAD 2011] Yu Wang, Mo Xu, Ling Ren, Xiaorui Zhang, Di Wu, Ningyi Xu, Yong He, Huazhong Yang, "A Heterogeneous Accelerator Platform for Multi-subject Voxel-based Brain Network Analysis", International Conference on Computer-Aided Design, 2011. (Paper Slides)

Presentation

• Ren, L., 2011. GPU Sparse LU Factorization and its Application in Circuit Simulation, Invited talk at Institute of Software, Chinese Academy of Sciences.
• Ren, L., 2011, "Performance Analysis of Parallel Sparse LU Factorization on Multi-core CPUs and GPUs", at National Symposium on High Performance Algorithm and Software, Beijing, Dec 2011.